An Off-chip Capacitor-free Low-Dropout Regulator with Enhanced Slew-Rate

Abstract

The fully integrated low-dropout regulator (LDO) without external capacitors provides a low-noise, low-ripple power supply voltage suitable for highly integrated system-on-chip (SoC) applications. To address the issues of slow transient response and reduced stability associated with off-chip capacitor-free LDOs, a novel transient enhancement circuit is proposed to accelerate the charging and discharging rates of the power transistor, thereby improving the LDO’s transient response speed. This design is based on a standard 180 nm CMOS process and employs a 2 pF Miller compensation capacitor for stabilization. It can deliver a maximum load current of 20 mA with a voltage drop of 200 mV over a supply voltage range of 3 V to 1.2 V. The quiescent current of the LDO is 26 μA under no-load conditions. When the load current switches between 100 μA and 20 mA with a rise and fall time of 50 ns, the overshoot voltage is 71 mV with a recovery time of 0.32 μs, while the undershoot voltage is 88 mV with a recovery time of 0.44 μs.

Yichen Zhang

Master’s Student

My research interests include circuit design of low dropout regulator and hybrid energy harvesting system.

Zeyu Yang

Master’s Student

My research interests include circuit design of charge pump and radio frequency energy harvesting system.

Jian Guan

PhD Student

My research interests include the design of solar cells and energy harvesting circuits.

Bingjun Xiong

PhD Student

My research interests include circuit design of optical receivers and references.

Xinying Su

Master’s Student

My research interests include circuit design of CMOS memristor simulators and neuromorphic chips.

Jingjing Liu

Associate Professor

My research interests include low-power smart micro-sensor integrated circuit design, image sensors, biomedical sensors, and energy harvesting circuits.