A Second-Order Dual-Charge-Pump Passive Noise-Shaping SAR ADC for Medical Implant Devices

Abstract

A 14.14bit 2MS/s Second-Order Passive Noise-Shaping Successive Approximation Register Analog-to-Digital Converter (NS SAR ADC) is proposed in this paper. The structure utilizes techniques such as charge pumps and multi-input comparator with a gain to compensate for the signal loss during the noise shaping process. It incorporates two zero points at 0.8 in the noise transfer function (NTF), which enhances the noise shaping capability. This ADC is designed using a standard 180nm CMOS process. The simulation results show that the ADC consumes 56.8 μ W, achieving a signal-to-noise-and-distortion ratio (SNDR) of 86.75 dB and a spurious-free dynamic range (SFDR) of 97.16 dB with an oversampling ratio (OSR) of 8 at 2MS/s, resulting in an Schreier figure of merit (FoMs) of 180.18dB.

Publication
In 2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT), 2024
Kangkang Sun
Kangkang Sun
PhD Student

My research interests include circuit design of analog to digital converter for biomedical applications and SAR ADC.

Haoning Sun
Haoning Sun
Master’s Student

My research interests include circuit design of analog to digital converter for biomedical applications and noise shaping SAR ADC.

Yuchen Wang
Yuchen Wang
Master’s Student

My research interests include the design of high dynamic range and multi-mode image sensors.

Jingjing Liu
Jingjing Liu
Associate Professor

My research interests include low-power smart micro-sensor integrated circuit design, image sensors, biomedical sensors, and energy harvesting circuits.