
This paper addresses the critical issue of high fixed-pattern noise (FPN) caused by source-follower threshold-voltage (Vth) mismatch in high-dynamic-range (HDR) CMOS image sensor (CIS) inspired by visual neuronal response. We propose a threshold-voltage-mismatch cancellation technique that employs a simple capacitor-based sampling network to dynamically store and cancel pixel-specific Vth offsets during the quantization phase. This approach effectively suppresses FPN without requiring power-intensive operational amplifiers or complex digital circuitry. Pre-layout simulation results in a 180 nm CMOS process demonstrate that under significant process induced Vth variations, the proposed technique reduces the standard deviation of output digital codes from 11.56 LSB to 1.04 LSB, achieving 91.0% suppression of Vth-induced FPN. The circuit architecture introduces zero static power overhead, making it ideally suited for high-quality bio-inspired vision sensing in ultra-low-power Internet of Things applications.